EVALUATION CIRCUIT FOR DETECTING AND/OR LOCATING FAULTY DATA WORDS IN A DATA STREAM TN

摘要

The evaluation circuit according to the invention comprises a first linear automatic circuit (L1) and a second linear automatic circuit (L2) that is connected in parallel (L2), having an amount of states z(t) which have a common input line for receiving a data stream Tn. The first linear automatic circuit (L1) and the second linear automatic circuit (L2) are configured in such a way that a first signature (S1) or a second signature (S2) is calculated. A first logic gate array (XOR L1) and a second logic gate array (XORL2), which compare the signature (S1, S2) calculated by the linear automatic circuit (L1, L2) with a pre-set good signature and issue a comparative value, are located after both linear automatic circuits (L1, L2).