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DIVERSITY RECEIVER FREE FROM DECODING ERROR, AND CLOCK REGENERATION CIRCUIT FOR DIVERSITY RECEIVER
DIVERSITY RECEIVER FREE FROM DECODING ERROR, AND CLOCK REGENERATION CIRCUIT FOR DIVERSITY RECEIVER
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机译:没有解码错误的多样性接收器,以及多样性接收器的时钟再生电路
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摘要
A diversity receiving apparatus separately weights reception signals of a plurality of reception systems using combining coefficients based on a respective amplitude component of each reception signal and combines the weighted reception signals. The diversity receiving apparatus extracts symbol sections in the combined reception signals, and generates a clock for detecting symbols. The diversity receiving apparatus includes a converting unit 314 for uniformly multiplying the combining coefficients if every combining coefficient is below a predetermined threshold and I component ROMs,. Q component ROMs, an I component adder 325 and a Q component adder 326 that combine the reception signals using the multiplied combining coefficients. IMAGE
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