首页> 外国专利> METHOD FOR FORMING DUAL DAMASCENE PATTERN TO PREVENT VIA FACETING PHENOMENON AND VIA BOWING PHENOMENON CAUSED BY DIFFERENCE OF VIA HOLE DENSITY AND AVOID INCREASE OF DIELECTRIC CONSTANT OF LOW-K INTERLAYER DIELECTRIC

METHOD FOR FORMING DUAL DAMASCENE PATTERN TO PREVENT VIA FACETING PHENOMENON AND VIA BOWING PHENOMENON CAUSED BY DIFFERENCE OF VIA HOLE DENSITY AND AVOID INCREASE OF DIELECTRIC CONSTANT OF LOW-K INTERLAYER DIELECTRIC

机译:形成双大马士革图案的方法,该方法可防止面孔现象和孔密度差异以及低k层间介电常数的介电常数增加引起的弯曲现象

摘要

A kind of purpose: method, it is used to form the increase that a dual damascene pattern is arranged to prevention channel discrete phenomenon and the channel bow phenomenon as caused by a difference of channel hole density and avoids the dielectric constant of a low-k layer insulation, by preventing low-k layer insulation and a lower interconnection from being exposed to the oxygen plasma for removing an organic bottom arc (anti-reflection coating). Construction: a diffusion barrier layer (12), a layer insulation (13) and a cap layers (14) are formed in a substrate (10), have and are connected with each other. The exposed portion of cap layers and layer insulation is etched to form access opening (16) by access opening etch process. Mononitride separator is formed in the side wall in through-hole hole. One organic bottom arc is formed in composite structure. The exposed portion of organic bottom arc, cap layers and layer insulation is etched by a predetermined depth and forms a bar ditch (19) by a trench etch process. Nitride spacer is removed. The diffusion barrier layer contacted with the bottom in through-hole hole is eliminated.
机译:一种目的:方法,用于形成增加双镶嵌图案的增加,以防止由于沟道空穴密度的不同而引起的沟道离散现象和沟道弯曲现象,并避免低k值的介电常数通过防止低k层绝缘和较低的互连层暴露在氧等离子体中以去除有机底电弧(减反射涂层),可实现层绝缘。构造:在衬底(10)中形成扩散阻挡层(12),层绝缘体(13)和覆盖层(14),它们相互连接。通过通路开口蚀刻工艺蚀刻盖层和层绝缘的暴露部分以形成通路开口(16)。单氮化物隔板形成在通孔的侧壁中。在复合结构中形成一个有机底弧。有机底弧,覆盖层和绝缘层的暴露部分被蚀刻预定深度,并通过沟槽蚀刻工艺形成条沟(19)。去除氮化物垫片。消除了与通孔底部接触的扩散阻挡层。

著录项

  • 公开/公告号KR20050017844A

    专利类型

  • 公开/公告日2005-02-23

    原文格式PDF

  • 申请/专利权人 MAGNACHIP SEMICONDUCTOR LTD.;

    申请/专利号KR20030055297

  • 发明设计人 YOON JUN HO;

    申请日2003-08-11

  • 分类号H01L21/28;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:49

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