首页> 外国专利> OUTPUT ADDRESS CALCULATOR OF TURBO INTERLEAVER CAPABLE OF OMITTING TIME REQUIRED FOR OBTAINING INEFFECTIVE ADDRESSES

OUTPUT ADDRESS CALCULATOR OF TURBO INTERLEAVER CAPABLE OF OMITTING TIME REQUIRED FOR OBTAINING INEFFECTIVE ADDRESSES

机译:TURBO交错器的输出地址计算器,能够获得无效地址所需的时间

摘要

Purpose: an output address calculator of a turbine interleaver is arranged to reduce address, and the acquisition time saves the time needed, for obtaining invalid address. Construction: a counter (21) exports the first binary value, with n+5 length and the second binary value, increases by one from the first binary value. The mixed type power of counter is used to refer to a table as index by using value n. First and second interleaver output address calculation block (20,30) exports interim output address according to a selected value and an accumulated value. One multiplexer (40) selects effective output address from first output valve and calculates the output address of a turbine interleaver.
机译:目的:布置涡轮交织器的输出地址计算器以减少地址,并且获取时间节省了获得无效地址所需的时间。结构:计数器(21)输出长度为n + 5的第一个二进制值,第二个二进制值从第一个二进制值增加一个。计数器的混合类型幂使用值n来将表称为索引。第一和第二交织器输出地址计算块(20,30)根据选择值和累加值输出临时输出地址。一个多路复用器(40)从第一输出阀中选择有效输出地址,并计算出涡轮交织器的输出地址。

著录项

  • 公开/公告号KR20050022511A

    专利类型

  • 公开/公告日2005-03-08

    原文格式PDF

  • 申请/专利权人 LG ELECTRONICS INC.;

    申请/专利号KR20030061015

  • 发明设计人 JUNG HEE SUNG;

    申请日2003-09-02

  • 分类号H03M13/37;

  • 国家 KR

  • 入库时间 2022-08-21 22:05:46

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