A DEVICE OF LOW POWER CONSUMPTION WITH n DIRECTION INNER PRODUCTION FOR ADDER BASED DISTRIBUTED ARITHMETIC

摘要

PURPOSE: A device for reducing power consumption of an n-direction distributed inner product operation based an adder is provided to reduce the power consumption without influencing on an operation result by partially activating the BSAs(Bit Serial Adder). CONSTITUTION: The first BSA(100) receives the first and the second input signal, and outputs a full addition operation by an enable signal and a clock signal. The first AND gate(110) operates an AND operation by receiving the first and the second constant, and outputs a result to the first BSA as the enable signal. The second BSA(120) receives the third and the fourth input signal, and outputs the full addition operation by the enable signal and the clock signal. The second AND gate(130) operates the AND operation by receiving the third and the fourth constant, and outputs the result to the second BSA as the enable signal. The third BSA(140) receives the signal of the first and the second BSA, and outputs the full addition operation by the enable signal and the clock signal. The first OR gate(150) operates an OR operation by receiving the first and the second constant, and outputs the result as the fifth constant.