首页> 外国专利> adc clock timing recovery circuit and the error recovery method in Pr4 signal pre-processing of the signal processing channel region

adc clock timing recovery circuit and the error recovery method in Pr4 signal pre-processing of the signal processing channel region

机译:信号处理通道区域的Pr4信号预处理中的adc时钟定时恢复电路及误差恢复方法

摘要

Discloses an ADC clock timing error recovery circuits at the signal pre-processing region of the PR4 channel signal processing to recover the timing error of the ADC sampling clock signal from the pre-treatment area.; ADC clock timing error recovery circuits at the signal pre-processing of the PR4 signal processing channels of the present invention, the area is provided with ADC timing error detector, a timing recovery PLL unit and the ADC clock Phase compensation section. The ADC timing error detector receives the output signal of the ADC and detects a timing error. The timing recovery PLL unit generates the ADC clock signal compensation according to the output signal of the ADC timing error detection unit. The ADC clock Phase compensation unit allows to input the timing recovery PLL unit output signal with the sampling clock of the ADC.; Therefore, it is possible to recover the timing error of the ADC sampling clock signal from the pre-treatment zone to the ADC before the main signal processing to accurately convert the PR4 analog signal into a digital signal in accordance with the present invention.
机译:在PR4通道信号处理的信号预处理区域公开ADC时钟定时误差恢复电路,以从预处理区域恢复ADC采样时钟信号的定时误差。在本发明的PR4信号处理通道的信号预处理中的ADC时钟定时误差恢复电路,该区域设有ADC定时误差检测器,定时恢复PLL单元和ADC时钟相位补偿部分。 ADC定时误差检测器接收ADC的输出信号并检测定时误差。时序恢复PLL单元根据ADC时序误差检测单元的输出信号产生ADC时钟信号补偿。 ADC时钟相位补偿单元允许将定时恢复PLL单元的输出信号与ADC的采样时钟一起输入。因此,根据本发明,可以在主信号处理之前将ADC采样时钟信号的时序误差从预处理区域恢复到ADC,以将PR4模拟信号准确地转换为数字信号。

著录项

  • 公开/公告号KR100474995B1

    专利类型

  • 公开/公告日2005-02-24

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO. LTD.;

    申请/专利号KR19970039939

  • 发明设计人 KIM CHEOL JIN;

    申请日1997-08-21

  • 分类号G11B20/10;

  • 国家 KR

  • 入库时间 2022-08-21 22:04:03

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