首页> 外国专利> Cache memory device having dynamically-allocated or deallocated buffers, digital data processing system comprising it and method thereof

Cache memory device having dynamically-allocated or deallocated buffers, digital data processing system comprising it and method thereof

机译:具有动态分配或释放缓冲区的高速缓存存储设备,包括该高速缓存存储设备的数字数据处理系统及其方法

摘要

Dynamically cache memory device that has a buffer that is assigned or released, a digital data processing system and method comprising same are disclosed. The cache memory device, or a digital data processing system includes a buffer in a portion of dynamic cache memory regardless of the address and size of the buffer is allocated and freed by the buffer, and thus can be efficiently accessed in a system using a cache memory, has the. That is, after the contents of the buffer by the write operation in the buffer is placed in the internal cache memory is defined, when the contents of the buffer to the operation to be read in order to be used for other operations, the main caused not required by the operational characteristics of a cache It can eliminate access to the memory. Therefore, it is effective to provide an intuitive and friendly programming interface to the user (user).
机译:公开了一种具有分配或释放的缓冲器的动态高速缓冲存储器设备,数字数据处理系统和包括该数字数据处理系统的方法。高速缓冲存储器设备或数字数据处理系统在动态高速缓冲存储器的一部分中包括缓冲器,而不管缓冲器的地址和大小由缓冲器分配和释放,因此可以在使用高速缓冲存储器的系统中被有效地访问。记忆,有。也就是说,在通过缓冲区中的写操作将缓冲区的内容放置在内部高速缓冲存储器中之后,当缓冲区的内容以要用于其他操作的方式被读取时,主要原因是高速缓存的操作特性不需要它可以消除对内存的访问。因此,向用户(用户)提供直观且友好的编程界面是有效的。

著录项

  • 公开/公告号KR100505695B1

    专利类型

  • 公开/公告日2005-08-03

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR20030047539

  • 发明设计人 정우영;조상연;

    申请日2003-07-12

  • 分类号G06F12/08;

  • 国家 KR

  • 入库时间 2022-08-21 22:03:36

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