Shaper periodic signals of arbitrary shape in the residue number system

摘要

u0444u043eu0440u043cu0438u0440u043eu0432u0430u0442u0435u043bu044c periodic signals of arbitrary shape in the remaining classes containing the u043eu0442u043bu0438u0447u0430u044eu0449u0438u0439u0441u00a0 generator, so that it has n ring n number of shift registers, the tabular multiplier tubes on the module generator harmonious signal power divider (probes u0443u043fu0440u0430u0432u043bu00a0u0435u043cu044bu0445 u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439, u043au0430u0436u0434u0430u00a0 of kotor s contains n u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439, adder, power, phase shift module to / 2,phase frequency detector and the sample and u0445u0440u0430u043du0435u043du0438u00a0 solution which u00a0u0432u043bu00a0u0435u0442u0441u00a0 access device, and the second ring shift register contains mi u0440u0430u0437u0440u00a0u0434u043eu0432 (m1, m2,...mN is likewise simple whole positive number), the output q of u0440u0430u0437u0440u00a0u0434u0430 i-th circular shift register is connected to a q. u0440u0430u0437u0440u00a0u0434u043eu043c unitary code first u043eu043fu0435u0440u0430u043du0434u0430 i-th table u0438u0447u043du043eu0433u043e u0443u043cu043du043eu0436u0438u0442u0435u043bu00a0 module, which is connected to the second u043eu043fu0435u0440u0430u043du0434u0430 u0440u0430u0437u0440u00a0u0434u0430u043c unitary code balance module mi u0437u043du0430u0447u0435u043du0438u00a0 frequency is u0441u0438u0433u043d barnthe exit of i-th u0443u043cu043du043eu0436u0438u0442u0435u043bu00a0 matrix based on the module is connected to the first u0432u0445u043eu0434u0430u043c i's u0443u043fu0440u0430u0432u043bu00a0u0435u043cu044bu0445 u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439 in each range gate generator with u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439, ga u0440u043cu043eu043du0438u0447u0435u0441u043au043eu0433u043e signal is connected to the front u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu00a0 / 2 and the u0434u0435u043bu0438u0442u0435u043bu00a0 power j gate which is connected with the second inputs the first u0443u043fu0440u0430u0432u043bu00a0u0435u043cu044bu0445 u0444u0430u0437u043eu0432u0440u0430u0449u0430 of the j th edge u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439,the j - oh the u0443u043fu0440u0430u0432u043bu00a0u0435u043cu044bu0445 u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439 output l of u0443u043fu0440u0430u0432u043bu00a0u0435u043cu043eu0433u043e u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu00a0 is connected with a second entrance (l + 1) - th u0443u043fu0440u0430u0432u043bu00a0u0435u043cu043eu0433u043e u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu00a0 and exits n's, nrm u0430u0432u043bu00a0u0435u043cu044bu0445 u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439 u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu0435u0439 line are connected to the respective u0432u0445u043eu0434u0430u043c u0441u0443u043cu043cu0430u0442u043eu0440u0430 power output of which is connected to the second phase of the u0442u0435u043au0442u043eu0440u0430,a phase detector is connected to the first entrance exit u0444u0430u0437u043eu0432u0440u0430u0449u0430u0442u0435u043bu00a0 / 2, in this way the phase detector is connected to the first device and the sample u0445u0440u0430u043du0435u043du0438u00a0, the second entrance;of which, as well as u0442u0430u043au0442u043eu0432u044bu0435 entrances of shift registers, connected to a reference generator.