A circuit and method for data rate adjustment in the case of a variable rates ratio with an adjustable buffer memory partitioning includes partitioning by

摘要

Circuit for the data rate adjustment, with– an input memory for buffer-storing data of a data stream,– a rate adaptation stage (12) for the puncturing and / or repeating of data read from the input memory with a variable rate matching factor (k), and– an output memory for buffer-storing the of the rate adaptation stage (12) and for outputting a received data rates changed data stream,characterized in that– of the initially - and the output memory as a memory areas (i; a) of a single, variable paritionierbaren memory (11) are performed, and– the circuit means (cl1) for adjusting the size of a locking position holds the context of the memory (11) as a function of the rate matching factor (k) comprises.