首页> 外国专利> Arrangement for stress reduction for substrate-based chip packages has uniform trench-shaped structures on chip side of substrate to interrupt or displace thermally induced mechanical stress

Arrangement for stress reduction for substrate-based chip packages has uniform trench-shaped structures on chip side of substrate to interrupt or displace thermally induced mechanical stress

机译:用于基于衬底的芯片封装的应力减小的布置在衬底的芯片侧具有均匀的沟槽形结构,以中断或置换热引起的机械应力。

摘要

The stress reduction arrangement has uniform trench-shaped structures (11) formed on the chip side of the substrate (1) to which the chip is fixed so as to enclose the chip (6) so as to interrupt or displace the thermally induced mechanical stress in the substrate. The trench-shaped structures are etched into the substrate.
机译:应力减小装置具有均匀的沟槽形结构(11),该沟槽形结构形成在固定有芯片的基板(1)的芯片侧上,以包围芯片(6),从而中断或置换热致机械应力。在基板上。沟槽形结构被蚀刻到衬底中。

著录项

  • 公开/公告号DE10323296A1

    专利类型

  • 公开/公告日2005-01-05

    原文格式PDF

  • 申请/专利权人 INFINEON TECHNOLOGIES AG;

    申请/专利号DE20031023296

  • 发明设计人 PAUL JENS;REIS MARTIN;

    申请日2003-05-21

  • 分类号H01L23/32;H01L23/50;H01L23/13;

  • 国家 DE

  • 入库时间 2022-08-21 22:01:23

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