Phase-change random access memory cell device, has write driver control circuit coupled to address decoder to vary pulse width and pulse count of pulse currents according to load between write driver and cell selected by decoder

摘要

The device has a write driver (230) to generate a reset pulse current and a set pulse current to program a phase-change memory cell (260) selected by an address decoder into an amorphous state and a crystalline state, respectively. A write driver control circuit coupled to an address decoder varies a pulse width and a pulse count of the pulse currents according to a load between the write driver and the memory cell. An independent claim is also included for a method of programming a phase-change memory device having phase-change memory cells.