a design of a triple redundant latches with lower certain amp; all; gerungszeit

摘要

ina preferred variant hrungsbeispiel and professional;the invention provides a circuit and a method for a smaller r & d; rand faster triple redundant latch. three adjustable memoryan identical logical value in each adjustable speicherelementa. after the adjustable memory are set.a abstimmstruktur with input signal of the firstadjustable speicherelement, the second adjustable speicherelement anda steuerungssignal to the adjustable memorieslogical value of the third variable speicherelementis held. the ausbreitungsverz & all; and through the third adjustablespeicherelement is the only ausbreitungsverz & all; and the triple redundantlatches.