Circuit for a full multiplier based on ternary and quaternary logic has pnp and and and or or dual gates and four logic numbers from four different voltage levels

摘要

A full multiplier circuit based on ternary/quaternary logic comprises PNP-logic AND-AND (10) and OR-OR (9) dual gates (5,7) giving a ternary signal to an end stage (17). Signal (A,B) control inputs and outputs (Q1,Q2) control four P-logic AND, three P-logic OR gates and one P-logic half-adder. The output has four potential levels.