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medienzugriffskontroller and medienunabhu00e4ngige interface (mii) for connecting to a physical layer device

机译:medienzugriffskontroller和medienunabh u00e4ngige接口(mii),用于连接到物理层设备

摘要

A network node includes a serial physical sublayer (PHY) chip, a parallel PHY chip, and a media access control (MAC) chip. The serial physical sublayer chip, includes a single bit transmit data input (122), a single bit receive data output (123), and serial PHY control signal input/output (I/O) lines (115). The parallel PHY chip includes a multi-bit transmit data input (132), a multi-bit receive data output (133), and parallel PHY control signal I/O lines. The MAC chip includes a multi-bit transmit data output (112), a multi-bit receive data input (113) and parallel control signal I/O lines (115). The multi-bit transmit data output (112) is connected to the multi-bit transmit data input (132). One bit of the multi-bit transmit data output (112) is connected to the single bit transmit data input (122). The multi-bit receive data input (113) is connected to the multi-bit receive data output (133). One bit of the multi-bit receive data input (113) is connected to the single bit receive data output (123). The parallel control signal I/O lines (115) are connected to the parallel PHY control signal I/O lines. A subset of the parallel control signal I/O lines (115) are connected to the serial PHY control signal I/O lines. IMAGE
机译:网络节点包括串行物理子层(PHY)芯片,并行PHY芯片和媒体访问控制(MAC)芯片。串行物理子层芯片包括一位发送数据输入(122),一位接收数据输出(123)和串行PHY控制信号输入/输出(I / O)线(115)。并行PHY芯片包括多位发送数据输入(132),多位接收数据输出(133)和并行PHY控制信号I / O线。 MAC芯片包括多位发送数据输出(112),多位接收数据输入(113)和并行控制信号I / O线(115)。多位发送数据输出(112)连接到多位发送数据输入(132)。多位发送数据输出(112)的一位连接到单位发送数据输入(122)。多位接收数据输入(113)连接到多位接收数据输出(133)。多位接收数据输入(113)的一位连接到单位接收数据输出(123)。并行控制信号I / O线(115)连接到并行PHY控制信号I / O线。并行控制信号I / O线(115)的子集连接到串行PHY控制信号I / O线。 <图像>

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