首页> 外国专利> PHASE DELAY LOOP COMPRISING A CONTROL UNIT CAPABLE OF VARYING THE NUMBER OF DELAY UNITS OF A VOLTAGE CONTROLLED DELAY LINE AND ITS METHOD OF ORDERING THE SAME

PHASE DELAY LOOP COMPRISING A CONTROL UNIT CAPABLE OF VARYING THE NUMBER OF DELAY UNITS OF A VOLTAGE CONTROLLED DELAY LINE AND ITS METHOD OF ORDERING THE SAME

机译:包含能够改变电压控制延迟线的延迟单元数目的控制单元的相延迟环及其排序方法

摘要

Phase locked loop integrated circuits include a phase detection circuit, a variable delay device and a delay control circuit. The variable delay device and delay control circuit provide improved characteristics by increasing the signal frequency bandwidth of the delay locked loop integrated circuit in a preferred manner. The phase detection circuit is configured to perform the functions of comparing first and second periodic signals and generating a phase control signal (e.g., VCON) having a first property (e.g., magnitude) that is proportional to a difference in phase between the first and second periodic signals. The delay control circuit is responsive to the phase control signal VCON and generates a delay control signal that is provided to the variable delay device. The delay control circuit may comprise a counter, a first comparator, a second comparator and a shift register. The variable delay device includes a variable delay line and a compensation delay device. The variable delay line may contain a string of unit delay devices and a string of switches that each have an input electrically coupled to an output of a corresponding unit delay device. Each of the unit delay devices in the string may provide a fixed delay or a variable delay that is influenced (e.g., increased) by changes (e.g., increases) in the magnitude of the phase control signal VCON.
机译:锁相环集成电路包括相位检测电路,可变延迟装置和延迟控制电路。可变延迟装置和延迟控制电路通过以优选方式增加延迟锁定环集成电路的信号频率带宽来提供改进的特性。相位检测电路被配置为执行比较第一和第二周期信号并生成具有与第一和第二相位之间的相位差成比例的第一特性(例如,幅度)的相位控制信号(例如,VCON)的功能。周期性信号。延迟控制电路响应于相位控制信号VCON并产生提供给可变延迟装置的延迟控制信号。延迟控制电路可以包括计数器,第一比较器,第二比较器和移位寄存器。可变延迟装置包括可变延迟线和补偿延迟装置。可变延迟线可以包含一串单元延迟装置和一列开关,每个开关具有具有电耦合到对应的单位延迟装置的输出的输入。串中的每个单位延迟设备可以提供固定延迟或可变延迟,该固定延迟或可变延迟受到相位控制信号VCON的大小的改变(例如,增加)的影响(例如,增加)。

著录项

  • 公开/公告号FR2786634B1

    专利类型

  • 公开/公告日2005-02-25

    原文格式PDF

  • 申请/专利权人 SAMSUNG ELECTRONICS CO LTD;

    申请/专利号FR19990008873

  • 发明设计人 SANG BO LEE;JAE HYEONG LEE;

    申请日1999-07-08

  • 分类号H03L7/08;G11C27/04;H03H9/40;

  • 国家 FR

  • 入库时间 2022-08-21 21:58:40

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