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Boundary-scan test receiver with programmable hysteresis circuit

机译:具有可编程磁滞电路的边界扫描测试接收机

摘要

A boundary scan test receiver 320 for capturing signals during board interconnect testing has comparators 202, 204 each having a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage VREF. A programmable hysteresis circuit 306 is coupled to at least one input of each comparator. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay in order to provide programmable noise rejection to help prevent the comparators integrating signal noise. A single comparator may be used (figure 7). A method of boundary scan testing is also disclosed.
机译:用于在板互连测试期间捕获信号的边界扫描测试接收器320具有比较器202、204,每个比较器具有在板互连测试期间接收信号的第一输入和用于接收参考电压VREF的第二输入。可编程磁滞电路306耦合到每个比较器的至少一个输入。可编程磁滞电路可以被配置为对磁滞电压和/或磁滞延迟进行编程,以便提供可编程噪声抑制,以帮助防止比较器对信号噪声进行积分。可以使用单个比较器(图7)。还公开了边界扫描测试的方法。

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