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Boundary-scan test receiver with programmable hysteresis circuit
Boundary-scan test receiver with programmable hysteresis circuit
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机译:具有可编程磁滞电路的边界扫描测试接收机
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摘要
A boundary scan test receiver 320 for capturing signals during board interconnect testing has comparators 202, 204 each having a first input to receive signals during board interconnect testing, and a second input to receive a reference voltage VREF. A programmable hysteresis circuit 306 is coupled to at least one input of each comparator. The programmable hysteresis circuit may be configured to program a hysteresis voltage and/or a hysteresis delay in order to provide programmable noise rejection to help prevent the comparators integrating signal noise. A single comparator may be used (figure 7). A method of boundary scan testing is also disclosed.
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