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DIRECT MEMORY ACCESS CONTROLLER AND SYSTEM LSI INCLUDING DIRECT MEMORY ACCESS CONTROLLER

机译:直接存储器访问控制器和包括直接存储器访问控制器的系统LSI

摘要

PROBLEM TO BE SOLVED: To assure completion of writing to data in an area at a data transfer destination while maintaining efficiency of using a bus in data writing transfer.;SOLUTION: A transfer control part 285 divides data into a predetermined transfer unit to transfer the data when transferring the transfer data from a buffer to a device concerning an address at the transfer destination, in the case of the divided transfer data and the data concerning the final transfer, transfers the transfer data concerning the final transfer in a transfer system which requires a response from the device concerning the address at the data transfer destination and in the case of the divided transfer data and not the transfer data concerning the final transfer, transmits an instruction to be transferred in a transfer system which does not require the response from the device concerning the address at the data transfer destination.;COPYRIGHT: (C)2007,JPO&INPIT
机译:解决的问题:在确保在数据写入传输中使用总线的效率的同时,确保在数据传输目的地的区域中完成对数据的写入。解决方案:传输控制部285将数据划分为预定的传输单元以传输数据。在将传送数据从缓冲器传送到与传送目的地的地址有关的设备的数据时,在分开的传送数据和与最终传送有关的数据的情况下,在需要传送系统的传送系统中传送与最终传送有关的传送数据来自设备的关于数据传输目的地地址的响应,如果是分割的传输数据,而不是涉及最终传输的传输数据,则在不需要传输系统响应的传输系统中传输要传输的指令有关数据传输目的地地址的设备。版权所有:(C)2007,JPO&INPIT

著录项

  • 公开/公告号JP2006293927A

    专利类型

  • 公开/公告日2006-10-26

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20050117308

  • 发明设计人 TANABE ATSUSHI;

    申请日2005-04-14

  • 分类号G06F13/28;

  • 国家 JP

  • 入库时间 2022-08-21 21:56:43

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