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FUNCTION VERIFICATION DEVICE, TEST BENCH, MODEL DESIGNED BY HARDWARE DESCRIPTION LANGUAGE, SIMULATOR PROGRAM AND RECORDING MEDIUM

机译:功能验证设备,测试台,由硬件描述语言,仿真器程序和记录介质设计的模型

摘要

PROBLEM TO BE SOLVED: To improve function verification efficiency of an HDL model.;SOLUTION: When verifying a function of the HDL model 50 designed by a hardware description language, a flag set in a flag setting part 51 of the HDL model 50 is confirmed, and a process having no relationship to prescribed function verification is omitted when a process-omitting flag is set in the flag setting part 51. Thereby, because the process (e.g. wait operation in time of a system start) having no relationship to the function verification is not executed every time executing various kinds of function verification, the function verification efficiency of the HDL model 50 can be improved.;COPYRIGHT: (C)2006,JPO&NCIPI
机译:解决的问题:为了提高HDL模型的功能验证效率。解决方案:当验证由硬件描述语言设计的HDL模型50的功能时,确认设置在HDL模型50的标志设置部分51中的标志。并且,在标记设定部51中设定了省略处理标记的情况下,省略与规定的功能验证没有关系的处理。因此,与该功能无关的处理(例如系统启动时的等待操作)。每次执行各种功能验证都不执行验证,可以提高HDL模型50的功能验证效率。版权所有:(C)2006,JPO&NCIPI

著录项

  • 公开/公告号JP2006048149A

    专利类型

  • 公开/公告日2006-02-16

    原文格式PDF

  • 申请/专利权人 RICOH CO LTD;

    申请/专利号JP20040224362

  • 发明设计人 HAGIWARA ATSUSHI;

    申请日2004-07-30

  • 分类号G06F17/50;H01L21/82;

  • 国家 JP

  • 入库时间 2022-08-21 21:54:12

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