HIGH-SPEED AND LOW-POWER CLOCK GATED LOGIC CIRCUIT

摘要

PPROBLEM TO BE SOLVED: To provide a high-speed and low-power clock gated logic circuit capable of more speedily generating a gated clock signal by accomplishing a clock gated logic circuit so as to generate the gated clock signal based on a pulse. PSOLUTION: The gated clock logic circuit includes a pulse generator and a precharged latch. The pulse generator generates a pulse signal in response to a clock signal, and the precharged latch generates a gated clock signal in response to the clock signal, the pulse signal, and a control signal. PCOPYRIGHT: (C)2006,JPO&NCIPI