The instruction cache control system and the instruction cache control in the VLIW processor being

摘要

PPROBLEM TO BE SOLVED: To provide an instruction cache control system with improved cache utilization efficiency, shortened cache mishit time and accelerated instruction fetch by eliminating the necessity of insertion of an invalid operation instruction in VLIW (very long instruction word) processor. PSOLUTION: In the case of storing a VLIW instruction 110 from a secondary cache 401 to an instruction cache 400 in the instruction cache control system for the VLIW processor for executing a plurality of arithmetic operation instructions included in one VLIW instruction in parallel, an instruction cache block in the secondary cache 401 is directly stored in a data array of the instruction cache 400 without inserting an invalid operation instruction. PCOPYRIGHT: (C)2004,JPO