The parallel sub word instruction null data processor which sends the result to the sub word position which the result register of the data

摘要

In the context of a microprocessor and a program, the invention provides parallel subword compare instructions that store results in a selectable intra-register subword location. In a targeting approach, an instruction permits the location to be specified; alternatively, there can be plural instructions, each associated with one of the locations. In a replicating approach, plural replicas are stored in the alternative locations. In a shifting approach, the instruction moves prior results, so that the number of subsequent iterations of the instruction determines the location of a result. The invention provides for overwriting and content-preserving instructions, and for overlapping and separate locations. The invention allows results from multiple parallel subword compare operations with relatively few instructions. The invention also provides for other parallel subword instructions.