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The odd number line horizontal shift clock generation circuit which outputs the odd number line

机译:输出奇数线的奇数线水平移位时钟生成电路

摘要

PPROBLEM TO BE SOLVED: To prevent occurrence of video deviation caused at a PAL thinning time by canceling the effect of a switching noise due to a horizontal shift clock on an oscillated frequency of a voltage-controlled oscillator. PSOLUTION: A horizontal shift clock switch circuit 4 selects odd line shift clocks CPHO1 to CPHO3 from an odd number line horizontal shift clock generating circuit 2 and even line shift clocks CPHE1 to CPHE3 from an even number line horizontal shift clock generating circuit 3 and supplies the selected clocks to a color liquid crystal panel 11. The horizontal shift clock switch circuit 4 ordinarily selects the odd line shift clocks CPHO1 to CPHO3 and the even line shift clocks CPHE1 to CPHE3 in response to a line discrimination signal VCP33 and provides an output, and in the case of PAL thinning, the horizontal shift clock switch circuit 4 inverts the selection state of the shift clock just after starting the PAL thinning from the selection state just before the thinning start and again inverts the selecting state at a period a half the one horizontal scanning period. PCOPYRIGHT: (C)2004,JPO
机译:

要解决的问题:通过消除由水平移位时钟引起的开关噪声对压控振荡器的振荡频率的影响,防止在PAL稀疏时间引起的视频偏差发生。

解决方案:水平移位时钟切换电路4从奇数行水平移位时钟生成电路2选择奇数行移位时钟CPHO1至CPHO3,从偶数行水平移位时钟生成电路3选择偶数行移位时钟CPHE1至CPHE3。水平移位时钟切换电路4通常根据行识别信号VCP33选择奇数行移位时钟CPHO1至CPHO3和偶数行移位时钟CPHE1至CPHE3,并且将所选择的时钟提供给彩色液晶面板11。输出,并且在PAL细化的情况下,水平移位时钟切换电路4将PAL细化刚开始之后的移位时钟的选择状态从细化开始之前的选择状态反转,并且再次将选择状态在周期a反转。水平扫描周期的一半。

版权:(C)2004,日本特许厅

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