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Methods for creating and expanding libraries of structured ASIC logic and other functions

机译:用于创建和扩展结构化ASIC逻辑和其他功能的库的方法

摘要

Structured ASICs that are equivalent to FPGA logic designs are produced by making use of a library of known structured ASIC equivalents to FPGA logic functions. Such a library is expanded by a process that searches new FPGA logic designs for logic functions that either do not already have structured ASIC equivalents in the library or for which possibly improved structured ASIC equivalents can now be devised. The new and/or improved structured ASIC equivalents are added to the library, preferably with version information in the case of FPGA logic functions for which more than one structured ASIC equivalent is known.
机译:通过使用与FPGA逻辑功能等效的已知结构化ASIC等效库,可以生成与FPGA逻辑设计等效的结构化ASIC。通过在新的FPGA逻辑设计中搜索逻辑功能的过程来扩展这种库,这些逻辑功能要么在库中尚未具有结构化ASIC等效项,要么现在可以为其设计可能改进的结构化ASIC等效项。新的和/或经过改进的结构化ASIC等效项被添加到库中,在FPGA逻辑功能的情况下,最好将版本信息添加到该版本中,其中已知多个结构化ASIC等效项。

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