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Low power dynamic logic gate with full voltage swing operation

机译:具有全电压摆幅操作的低功耗动态逻辑门

摘要

Dynamic low-power logic using recycled energy is disclosed. Logic circuits have a discharge path, a precharge path and a control circuit. The precharge path is a PMOS transistor coupled between the clock line and the output node of the circuit and configured to charge the output node to the loic high voltage of the clock line during a precharge phase. During an evaluation phase, the discharge path computes the desired logic function at the output node. A control circuit is connected between the output node and the clock line and to the gate of the precharge path transistor. The control circuit provides the proper gate drive, regardless of the voltage on the output node or the inputs to the discharge path, to guarantee that the precharge transistor fully charges the output node to the logic high voltage of the clock line, which provides recycled energy for operating the circuit.
机译:公开了使用再循环能量的动态低功率逻辑。逻辑电路具有放电路径,预充电路径和控制电路。预充电路径是PMOS晶体管,其耦合在时钟线和电路的输出节点之间,并被配置为在预充电阶段将输出节点充电到时钟线的高电压。在评估阶段,放电路径在输出节点上计算所需的逻辑功能。控制电路连接在输出节点和时钟线之间,并连接到预充电路径晶体管的栅极。无论输出节点上的电压或放电路径输入的电压如何,控制电路均提供适当的栅极驱动,以确保预充电晶体管将输出节点完全充电至时钟线的逻辑高电压,从而提供了循环能量用于操作电路。

著录项

  • 公开/公告号US2006055429A1

    专利类型

  • 公开/公告日2006-03-16

    原文格式PDF

  • 申请/专利权人 LEI WANG;QIANG LI;JIANBIN WU;

    申请/专利号US20050269776

  • 发明设计人 QIANG LI;LEI WANG;JIANBIN WU;

    申请日2005-11-07

  • 分类号H03K19/096;

  • 国家 US

  • 入库时间 2022-08-21 21:47:39

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