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Cache memory, processing unit, data processing system and method for filtering snooped operations

机译:高速缓冲存储器,处理单元,数据处理系统和用于过滤侦听操作的方法

摘要

A cache coherent data processing system includes at least a first cache memory supporting a first processing unit and a second cache memory supporting a second processing unit. The first cache memory includes a cache array and a cache directory of contents of the cache array. In response to the first cache memory detecting on an interconnect a broadcast operation that specifies a request address, the first cache memory determines from the operation a type of the operation and a coherency state associated with the request address. In response to determining the type and the coherency state, the first cache memory filters out the broadcast operation without accessing the cache directory.
机译:高速缓存相干数据处理系统至少包括支持第一处理单元的第一高速缓存存储器和支持第二处理单元的第二高速缓存存储器。第一缓存存储器包括缓存阵列和该缓存阵列的内容的缓存目录。响应于第一高速缓冲存储器在互连上检测到指定请求地址的广播操作,第一高速缓冲存储器从该操作中确定该操作的类型以及与该请求地址相关联的一致性状态。响应于确定类型和一致性状态,第一高速缓冲存储器过滤掉广播操作而不访问高速缓存目录。

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