Real time clock architecture and/or method for a system on a chip (SOC) application

摘要

An apparatus comprising a first portion, a second portion and a processor. The first portion is configured to generate a count signal in response to a number of oscillations of a clock signal. The first portion is powered by an unswitched power source. The second portion is configured to generate an interrupt signal in response to the count signal and a predetermined stored value. The second portion is powered by a switched power source. The processor is configured to (i) receive the interrupt signal and (ii) generate the switched power.