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Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop
Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop
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机译:扩展比较器,用于控制延迟锁定环或锁相环中的数字延迟线
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摘要
A digital delay locked loop (DLL) includes a phase detector that measures the phase difference between a signal to be synchronized and a reference signal. The phase detector produces an increase or decrease signal in response to the phase difference between the two signals. This signal is received by a binary counter, which changes its count in response. The output of the binary counter is supplied to a comparator logic that implements a thermometer coding scheme. Each of the comparator output signals enables or disables a corresponding transistor stack in a delay line, thereby changing the delay of the signal propagating through the delay line.
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