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LUT-based logic element with support for Shannon decomposition and associated method
LUT-based logic element with support for Shannon decomposition and associated method
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机译:支持Shannon分解的基于LUT的逻辑元素及相关方法
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摘要
A logic circuit comprising: a plurality of logic elements; wherein at least one logic element includes, first and second LUT blocks that includes an output; an output multiplexer that includes first and second inputs, an output, and that includes a control output; a control input multiplexer circuit including a control input and including first and second data inputs that can be configured to receive first and second data outputs provided by one or more other logic elements of the plurality of logic elements and that includes a data output that can be connected to the control input of the output multiplexer; and multiple control inputs that can be shared by the first and second LUT blocks.
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