Frequency discriminator using replica compensated delay lines and method of operation

摘要

A frequency discriminator for detecting phase shifts between sequential pulses in a frequency-shift keyed (FSK) signal having a nominal frequency, f. The frequency discriminator comprises: 1) a first current controlled delay line for receiving the FSK signal and delaying the FSK signal by a desired time delay to thereby produce a time-delayed FSK signal; 2) a multiplier for receiving and multiplying the FSK signal and the time-delayed FSK signal to thereby produce an output product signal proportional to a phase shift between said FSK signal and said time-delayed FSK signal; and 3) a delay locked loop comprising a second current controlled delay line substantially similar to the first current controlled delay line. The delay locked loop receives a reference clock signal having a time period equal to the desired time delay and adjusts a control current level in the second current controlled delay line until a delay of the second current controlled delay line matches the time period of the reference clock signal. The control current level is then used to adjust a delay of the first current controlled delay line.