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High speed CMOS transmit-receive antenna switch

机译:高速CMOS收发天线开关

摘要

A high-speed CMOS transmit/receive antenna switch includes a first transistor, a second transistor and a parasitic compensation network. The first transistor is operably coupled to an antenna, to a transmit path, and to receive a transmit/receive (T/R) control signal. The second transistor is operably coupled to the antenna, the receive path, and to receive the T/R control signal. When the T/R control signal is in a first state, the first transistor is active and the second transistor is inactive such that the transmit path is coupled to the antenna. When the T/R control signal is in a second state, the second transistor is active and the first transistor is inactive such that the receive path is coupled to the antenna. The parasitic compensation network is coupled to compensate for adverse effects of parasitic components of the first and second transistors at operating frequencies of the transmit/receive antenna switch.
机译:高速CMOS发射/接收天线开关包括第一晶体管,第二晶体管和寄生补偿网络。所述第一晶体管可操作地耦合到天线,发射路径以及接收发射/接收(T / R)控制信号。第二晶体管可操作地耦合到天线,接收路径,并接收T / R控制信号。当T / R控制信号处于第一状态时,第一晶体管处于活动状态,第二晶体管处于非活动状态,使得发射路径耦合至天线。当T / R控制信号处于第二状态时,第二晶体管是活动的,而第一晶体管是不活动的,使得接收路径耦合到天线。寄生补偿网络被耦合以在发射/接收天线开关的工作频率下补偿第一和第二晶体管的寄生成分的不利影响。

著录项

  • 公开/公告号US7120399B2

    专利类型

  • 公开/公告日2006-10-10

    原文格式PDF

  • 申请/专利权人 SHAHLA KHORRAM;

    申请/专利号US20030460605

  • 发明设计人 SHAHLA KHORRAM;

    申请日2003-06-12

  • 分类号H01Q11/12;H04B1/04;

  • 国家 US

  • 入库时间 2022-08-21 21:41:36

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