Distributed delay-locked-based clock and data recovery systems

摘要

A clock and data recovery system using a distributed variable delay line is provided. The clock and data recovery system can use a delay-locked loop methodology to align a local clock with an incoming data stream. The variable delay line can include a transmission line coupled with a plurality of variable capacitors responsive to a control voltage. The variable delay line can also have a ladder configuration of multiple LC subcircuits each having a variable impedance responsive to a control voltage.