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Built-in self test technique for programmable impedance drivers for RapidChip and ASIC drivers

机译:内置自检技术,用于RapidChip和ASIC驱动器的可编程阻抗驱动器

摘要

A circuit which includes the addition of test points and analog circuitry required to perform a four-point measurement technique. Test points are fed to an analog multiplexer which is under control of test logic added to the design to facilitate the testing. The output of the analog multiplexer is fed directly to an n-bit Analog-to-Digital Converter (ADC), when the number of bits is determined by the measurement resolution required for the circuit to be tested. The ADC is controlled by digital test logic instantiated in the design to perform the BIST operation. A known current is injected and held constant during the entire BIST operation, and the BIST logic performs voltage measurements. The voltage differential is compared by the BIST circuitry based on the values obtained from the ADC. Then, a pass/fail bit can be passed to a signal pin on the device to be compared by the ATE.
机译:一种电路,其中包括执行四点测量技术所需的测试点和模拟电路的添加。测试点被馈送到模拟多路复用器,该模拟多路复用器在添加到设计中以促进测试的测试逻辑的控制下。当位数由要测试的电路所需的测量分辨率确定时,模拟多路复用器的输出直接馈入n位模数转换器(ADC)。 ADC由设计中实例化的数字测试逻辑控制,以执行BIST操作。在整个BIST操作期间注入已知电流并将其保持恒定,然后BIST逻辑执行电压测量。 BIST电路根据从ADC获得的值比较电压差。然后,可以将通过/失败位传递到器件上的信号引脚,以便通过ATE进行比较。

著录项

  • 公开/公告号US7042242B2

    专利类型

  • 公开/公告日2006-05-09

    原文格式PDF

  • 申请/专利权人 KEVIN GEARHARDT;

    申请/专利号US20040852902

  • 发明设计人 KEVIN GEARHARDT;

    申请日2004-05-25

  • 分类号G01R31/26;

  • 国家 US

  • 入库时间 2022-08-21 21:41:12

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