A memory buffer realisation system and control method, especially for electric signal acquisition and generation devices.

摘要

1. A memory buffer realisation system, especially for electric signal acquisition and generation devices It is characterised in that at least one DIMM SDRAM memory module is used and connected to a target device. The transmission channel is established by four 16-bit blocks in the sense of an independent data masking signal connection to each block. The blocks are selected to ensure, that the inputs for module selection from particular SDRAM memory modules constituting the transmission channel could be connected to one of two or four module selection signals, while the data inputs/outputs of particular SDRAM memory modules constituting the transmission channel are connected to each other to establish a 16-bit data port.