Coprocessor for synthesizing signals based upon quadratic polynomial sinusoids

摘要

A coprocessor (15) for synthesizing a signal from the sum of sinusoids is disclosed. The coprocessor (15) is preferably included within an electronic system having a host processor (12) that forwards frame boundary parameters to the coprocessor (15) . Parameter registers (26) are provided in the coprocessor (15) for storing synthesis parameters for iteratively deriving amplitude and phase values for each sample point within a data frame. Adders (28, 30, 32) generate the current amplitude from one addition, and the current phase value from two additions, with the results of the additions stored back into the parameter registers (26). A sine function calculator circuit (34), such as may be implemented by way of a CORDIC technique, receives the current amplitude and phase values, and generate a digital component signal for the current sample point for one of the sinusoids. The digital component signal is accumulated with that of other sinusoids at the sample point in a data sample buffer (40), with the final accumulated digital components presented at an output (44) to the host processor (12).