LOW POWER PIPELINE METHOD FOR ARM7 MICROPROCESSOR

摘要

The present invention relates to a pipe line of a low-power ARM7 microprocessor, a multi-instruction fetch stage can determine that multi-cycle instruction in the instruction fetch stage to perform a decoding step of interpreting the instruction cycles carried out and, in the instruction fetch stage and a step of determining whether to perform a multi-cycle instructions have been carried out is carried out in a multi-cycle instruction check performed case is characterized in that in order to reduce power consumption does not the instruction fetch of the instruction following the instruction from the memory to perform multiple cycles. Thus ARM7 microprocessor to reduce power required for the memory access for instruction fetch unnecessary not the instruction fetch from the memory by the processor is unnecessary when performing multi-cycle instructions do.