首页> 外国专利> ROM-based audio buffering unit and removing jitter his memory which has a memory function from the jitter removal system methods

ROM-based audio buffering unit and removing jitter his memory which has a memory function from the jitter removal system methods

机译:基于ROM的音频缓冲单元,并从抖动消除系统方法中消除其具有存储功能的存储器的抖动

摘要

PURPOSE: An apparatus for buffering audio data is provided to have a function of removing a memory jitter caused by an optical pickup jump in a read only memory(ROM) system. CONSTITUTION: An apparatus for buffering audio data in a read only memory(ROM) by removing a memory jitter, comprises an eight to fourteen modulation(EFM) demodulator, an error correcting memory(34), a latch(42), an interface(62), a buffer memory(60), and a memory controller(38). The EFM demodulator separates EFM data into the audio data and sub code data. The EFM demodulator responds to synchronous signals detected from the EFM data, and generates record clock signals. The error correcting memory responds to record addresses to store the audio data, and responds to read addresses to read the audio data. The latch is synchronized with the sub code data. The latch latches sub code synchronous signals output from the EFM demodulator, by responding to read clock signals. The interface outputs the latched sub code data and the read audio data, by responding to the latched sub code synchronous signals and the read clock signals. The buffer memory stores the audio data and the sub code data output from the interface. The memory controller outputs the read clock signals generated by dividing system clock signals. The memory controller outputs the record addresses generated by responding to the record clock signals. The memory controller responds to control signals to unify the read addresses with the record addresses, and outputs the addresses.
机译:目的:提供一种用于缓冲音频数据的装置,其具有消除由只读存储器(ROM)系统中的光学拾取器跳跃引起的存储器抖动的功能。组成:一种用于通过消除存储器抖动来在只读存储器(ROM)中缓冲音频数据的设备,包括八到十四个调制(EFM)解调器,纠错存储器(34),锁存器(42),接口( 62),缓冲存储器(60)和存储器控制器(38)。 EFM解调器将EFM数据分为音频数据和子代码数据。 EFM解调器响应从EFM数据中检测到的同步信号,并生成记录时钟信号。纠错存储器响应记录地址以存储音频数据,并响应读取地址以读取音频数据。锁存器与子代码数据同步。锁存器通过响应读取的时钟信号来锁存从EFM解调器输出的子码同步信号。接口响应于锁存的子码同步信号和读取的时钟信号,输出锁存的子码数据和读取的音频数据。缓冲存储器存储从接口输出的音频数据和子代码数据。存储器控制器输出通过划分系统时钟信号而生成的读取时钟信号。存储器控制器输出通过响应记录时钟信号而生成的记录地址。存储器控制器响应控制信号以将读取地址与记录地址统一,并输出地址。

著录项

  • 公开/公告号KR100564538B1

    专利类型

  • 公开/公告日2006-06-07

    原文格式PDF

  • 申请/专利权人

    申请/专利号KR19980057143

  • 发明设计人 김현권;

    申请日1998-12-22

  • 分类号G06F12/14;

  • 国家 KR

  • 入库时间 2022-08-21 21:24:07

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