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Defect cells - repair circuit and defect cells - method of repair for a semiconductor memory device

机译:缺陷单元-修复电路和缺陷单元-半导体存储器件的修复方法

摘要

Repair circuit for repairing a defective cell in an encapsulated semiconductor memory device, thea normal cell array (500) for storing data,a redundant cell array (600) for storing of redundant data,a cells selection circuit (400) for selecting a memory cell from the normal or the redundant cell field depending on whether an enable signal (φre) for an access to a redundant cell is present or not, and alsothe repair circuit has with the following components:a repair mode freely administration circuit (100) for the alternative for releasing a of two possible operating states (repair mode or operating mode) of the repair circuit by outputting a first binary release signal for the repair mode (φmi),a defect cells address decoder (200), the only in the reparaturrodus enabled for decoding externally entered defect cells addresses (pm1 .. Pmn) of the normal cell array (500) and for generating a decoder output signal (φrm1 .. φrmn), andcontrol is a control circuit (300), theduring the repair mode, the output signal by the decoder, initialized defect cells address is stored continuously and these speichervor gear with the..
机译:用于修复封装的半导体存储装置中的缺陷单元的修复电路,用于存储数据的普通单元阵列(500),用于存储冗余数据的冗余单元阵列(600),用于选择存储单元的单元选择电路(400)取决于是否存在用于访问冗余小区的使能信号(φre),从正常或冗余小区字段中获取数据,并且修复电路还具有以下组件:修复模式的自由管理电路(100),用于通过输出用于修复模式(φmi)的第一二进制释放信号来释放修复电路的两种可能的操作状态(修复模式或操作模式)中的一种的方法,缺陷单元地址解码器(200),仅在修复后启用在修复过程中,用于对正常单元阵列(500)的外部输入的缺陷单元地址(pm1..Pmn)进行解码,并生成解码器输出信号(φrm1..φrmn),并且控制是控制电路(300)。 ode,由解码器输出的信号,初始化的缺陷单元地址被连续存储并与这些speichervor齿轮一起使用。

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