the device u0434u043bu00a0 u0438u0437u043cu0435u0440u0435u043du0438u00a0 velocity vector u0434u0432u0438u0436u0435u043du0438u00a0 u0438u0437u043eu0431u0440u0430u0436u0435u043du0438u00a0 u043fu0440u043eu0442u00a0u0436u0435u043du043du043eu0433u043e object with random distribution of u00a0u0440u043au043eu0441u0442u0435u0439

摘要

the device u0434u043bu00a0 u0438u0437u043cu0435u0440u0435u043du0438u00a0 velocity vector u0434u0432u0438u0436u0435u043du0438u00a0 u0438u0437u043eu0431u0440u0430u0436u0435u043du0438u00a0 u043fu0440u043eu0442u00a0u0436u0435u043du043du043eu0433u043e object with random distribution of u00a0u0440u043au043eu0441u0442u0435u0439 containing u043fu0440u043eu0435u043au0446u0438u043eu043du043du0443u044e optical with u0438u0441u0442u0435u043cu0443, computing unit, u043eu043fu0442u043eu044du043bu0435u043au0442u0440u043eu043du043du044bu0439 channel information processing, including the u0441u0440u0430u0432u043du0435u043du0438u00a0, sequentially the block and the block u0434u0438u0444u0444u0435u0440 u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0 u0435u043du0446u0438u0440u043eu0432u0430u043du0438u00a0 and receiver u0438u0437u043bu0443u0447u0435u043du0438u00a0 as u043fu0440u00a0u043cu043eu0443u0433u043eu043bu044cu043du0438u043au0430,the exits of which are connected to the respective inputs of u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0 and receiver u0438u0437u043bu0443u0447u0435u043du0438u00a0 has coefficient of u0444u043eu0442u043eu043fu0440u0435u043eu0431u0440u0430u0437u043eu0432u0430u043du0438u00a0, u0438u0437u043cu0435u043du00a0u044eu0449u0438u043cu0441u00a0 p on the power law, and the outlet is connected to the first computing unit u0434u0438u0444u0444u0435u0440u0435u043du0446u0438u0440u043eu0432u0430u043du0438u00a0 entrance block, u043eu0442u043bu0438u0447u0430u044eu0449u0435u0435u0441u00a0 so that, with a view to u043fu043eu0432u044bu0448u0435u043du0438u00a0 accuracy ism u0435u0440u0435u043du0438u00a0, he introduced the second u043eu043fu0442u043eu044du043bu0435u043au0442u0440u043eu043du043du044bu0439 channel information processingwith the u0441u0440u0430u0432u043du0435u043du0438u00a0, sequentially the block and the block u0434u0438u0444u0444u0435u0440u0435u043du0446u0438u0440u043eu0432u0430u043du0438u00a0 u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0 solution which is connected with the second gate computing blo here, as well as the receiver u0438u0437u043bu0443u0447u0435u043du0438u00a0 which are connected with the respective entrances, exits the block u0441u0443u043cu043cu0438u0440u043eu0432u0430u043du0438u00a0 in each channel information processing u043eu043fu0442u043eu044du043bu0435u043au0442u0440u043eu043du043du044bu0439 sake dan second block u0441u0440u0430u0432u043du0435u043du0438u00a0,the receiver is u0438u0437u043bu0443u0447u0435u043du0438u00a0 u0447u0435u0442u044bu0440u0435u0445u043au0432u0430u0434u0440u0430u043du0442u043du044bu043c, border u0441u043eu043fu0440u00a0u0436u0435u043du0438u00a0 u043au0432u0430u0434u0440u0430u043du0442u043eu0432 optical receiver u0438u0437u043bu0443u0447u0435u043du0438u00a0 combined with u0434u0438u0430u0433u043eu043du0430u043bu00a0u043cu0438 u043fu0440u00a0u043cu043eu0443u0433u043eu043bu044cu043du0438u043au0430, p u0440u0438u0435u043cu043du0438u043a u0438u0437u043bu0443u0447u0435u043du0438u00a0 has u0444u043eu0442u043eu043fu0440u0435u043eu0431u0440u0430u0437u043eu0432u0430u043du0438u00a0 rate, increasing the u043fu0440u00a0u043cu043eu0443u0433u043eu043bu044cu043du0438u043au0430 towards u0431u0438u0441u0441u0435u043au0442u0440u0438u0441u044b quadrant, and u043fu0440u043eu0442u0438u0432u043eu043bu0435u0436u0430u0449u0438u0445 u043au0432u0430u0434u0440u0430u043du0442u043eu0432 connected respectively to the inputs of first and second blocks u0441u0440u0430u0432u043du0435u043du0438u00a0,the exits which are connected with the respective entrances computing unit.