Method and apparatus for creating a behavioral aspect of a formal verification circuit

摘要

For the simplified creation of models of a circuit for the formal verification of the same, it is proposed to provide a valid first model (a) for example from a simulation of the circuit (2) and to generalize this valid first model through modification (3), whereby after the modification it is checked whether the modified model still describes an actual behavior of the circuit (4). In this case, the modified model is provided as a model of the circuit for the formal verification of the same (5).