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FUNCTIONING UNIT WITH FALSELY PROCESSED WAY SOLUTION CERTIFICATE AND SUPER-SCALAR MICROPROZER FOR THEIR USE

机译:具有伪造的过程解决方案证书和超标量微加工器的功能单元

摘要

A superscalar microprocessor is provided having functional units which receive a pointer (a reorder buffer tag) which is compared to the reorder buffer tags of the instructions currently being executed. The pointer identifies the oldest outstanding branch instruction. If a functional unit's reorder buffer tag matches the pointer, then that functional unit conveys its corrected fetch address to the instruction fetching mechanism of the superscalar microprocessor (i.e. the branch prediction unit). The superscalar microprocessor also includes a load/store unit which receives a pair of pointers identifying the oldest outstanding instructions which are not in condition for retirement. The load/store unit compares these pointers with the reorder buffer tags of load instructions that miss the data cache and store instructions. A match must be found before the associated instruction is presented to the data cache and the main memory system. The pointer-compare mechanism provides an ordering mechanism for load instructions that miss the data cache and store instructions.
机译:提供了一种超标量微处理器,该超标量微处理器具有接收指针(重排序缓冲区标记)的功能单元,该指针与当前正在执行的指令的重排序缓冲区标记进行比较。指针标识最旧的未完成分支指令。如果功能单元的重排序缓冲区标记与指针匹配,则该功能单元将其校正后的获取地址传送到超标量微处理器的指令获取机制(即分支预测单元)。超标量微处理器还包括一个加载/存储单元,该加载/存储单元接收一对指针,这些指针标识了最旧的未退出指令,这些指令没有退役的条件。加载/存储单元将这些指针与丢失数据高速缓存和存储指令的加载指令的重排序缓冲区标记进行比较。必须先找到匹配项,然后才能将关联的指令提供给数据高速缓存和主存储器系统。指针比较机制为丢失数据缓存和存储指令的加载指令提供了一种排序机制。

著录项

  • 公开/公告号DE69636484D1

    专利类型

  • 公开/公告日2006-10-05

    原文格式PDF

  • 申请/专利权人 ADVANCED MICRO DEVICES INC.;

    申请/专利号DE19966036484T

  • 发明设计人 TRAN M.;

    申请日1996-07-16

  • 分类号G06F9/38;

  • 国家 DE

  • 入库时间 2022-08-21 21:18:06

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