Synchronization doing in control manner and that device of synchronous type ram, and the system clock pulse outside synchronous type

摘要

There are provided a synchronous RAM controlling device and method for controlling a synchronous RAM in order to access data when a burst length of a memory access is full page regardless of whether a termination access method or a wrap-around access method is used. In the synchronous RAM controlling device, an OR gate performs an OR operation on a burst stop signal for stopping input/output of data in the synchronous RAM responsive to an externally received input/output operation command signal. A counter is reset in response to the OR-operation result and counts the cycles of an external system clock signal. A burst sensor senses completion of a burst operation according to a burst length signal which is externally received and represents a burst length of at least 1 and outputs the sensed result as the burst stop signal. A control signal is input to the burst sensor which causes the burst sensor to operate the memory in one of termination or wrap-around access methods. A controller outputs the control signal, where the value of the control signal indicates termination access method when a fuse of the controller is not cut and either no logic level or a high logic level are input to an input pad of the controller. When the fuse is cut or a logic low level is input to the input pad, then the control signal output by the controller will indicate wrap-around access method.