首页> 外国专利> SYSTEM AND METHOD FOR CONSTITUTING CONDUCTOR WITHIN INTEGRATED CIRCUIT FOR REDUCING VARIANCE OF IMPEDANCE CAUSED BY CONNECTION BUMP

SYSTEM AND METHOD FOR CONSTITUTING CONDUCTOR WITHIN INTEGRATED CIRCUIT FOR REDUCING VARIANCE OF IMPEDANCE CAUSED BY CONNECTION BUMP

机译:用于在集成电路中构成导体以减小由连接缓冲器引起的阻抗变化的系统和方法

摘要

PROBLEM TO BE SOLVED: To provide an improved semiconductor system and method for constituting a conductor for reducing variance of impedance caused by proximity and/or density, and/or operation of connection bump.;SOLUTION: The system and the method include a step of adding an impedance reduction conductive element which does not add any function to a semiconductor device. The added element is arranged within a sparse connection bump density area. The impedance reduction conductive element can include a metal wire added between functional metal wires. Arrangement between adjacent operation wires is various. The impedance reduction conductive element can be added to optional one or combination of conductive layers, and the added element can act on the one or combination of functional elements. The added element can be electrically dynamic and can make a response to the operation of the semiconductor device. The added element includes a method which is for deciding connection bump density and which can be automated.;COPYRIGHT: (C)2007,JPO&INPIT
机译:解决的问题:提供一种用于构成导体的改进的半导体系统和方法,以减少由接近度和/或密度和/或连接凸点的操作引起的阻抗变化。解决方案:该系统和方法包括以下步骤:添加了不会对半导体器件增加任何功能的降低阻抗的导电元件。添加的元素布置在稀疏的连接凸点密度区域内。所述降低阻抗的导电元件可以包括添加在功能金属线之间的金属线。相邻的操作线之间的布置是多种多样的。可以将降低阻抗的导电元件添加到可选的导电层之一或组合中,并且所添加的元件可以作用在功能元件的一个或组合上。所添加的元件可以是电动力学的,并且可以对半导体器件的操作做出响应。添加的元素包括一种用于确定连接凸点密度的方法,该方法可以自动化。;版权所有:(C)2007,JPO&INPIT

著录项

  • 公开/公告号JP2006344946A

    专利类型

  • 公开/公告日2006-12-21

    原文格式PDF

  • 申请/专利权人 TOSHIBA CORP;

    申请/专利号JP20060145805

  • 发明设计人 TAKASE SATORU;

    申请日2006-05-25

  • 分类号H01L21/822;H01L27/04;H01L21/82;H01L23/52;H01L21/3205;

  • 国家 JP

  • 入库时间 2022-08-21 21:10:17

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