The plural memory cells which remember the semiconductor memory and

摘要

A semiconductor memory device has a first precharge transistor connecting a potential supply line to one end of a bit line when the bit line is precharged and a second precharge transistor connecting the potential supply line to the other end of the bit line when the bit line is precharged. To a gate of the first precharge transistor is inputted a first precharge signal, and to a gate of the second precharge transistor is inputted a second precharge signal generated based on a chip-select signal and the first precharge signal. The second precharge transistor is brought into a cut-off state during a standby state in which a memory cell corresponding to the second precharge transistor does not read nor write data but holds date.