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Bus interface and a data transfer method in the bus interface

机译:总线接口和总线接口中的数据传输方法

摘要

PROBLEM TO BE SOLVED: To enable an easier physical extension of a bus while attaining a stable data transfer at a high speed.;SOLUTION: Data to be transferred is sent and received via a bus 10 in response to a control command from the bus master 10 between applications 20 instructed by the control command. Outputting of the control command by the bus master 10 and sending and receiving of the transfer data in the respective applications 20 are performed based on different clock signals CLK and REF. As a result, stable data transfer at a high speed can be attained and a physical extension of the bus becomes easy compared with the case of sending and receiving transfer data based only on a single clock signal as in the PCI.;COPYRIGHT: (C)2003,JPO
机译:解决的问题:为了使总线更容易物理扩展,同时实现高速稳定的数据传输。解决方案:响应于来自总线主站的控制命令,通过总线10发送和接收要传输的数据。在控制命令所指示的应用程序20之间进行图10的处理。基于不同的时钟信号CLK和REF,在各个应用程序20中进行总线主控器10的控制命令的输出以及传输数据的发送和接收。结果,与PCI中仅基于单个时钟信号发送和接收传输数据的情况相比,可以实现高速稳定的数据传输,并且总线的物理扩展变得容易。 )2003年,日本特许厅

著录项

  • 公开/公告号JP3941096B2

    专利类型

  • 公开/公告日2007-07-04

    原文格式PDF

  • 申请/专利权人 ソニー株式会社;

    申请/专利号JP20010361049

  • 发明设计人 豊島 誠;

    申请日2001-11-27

  • 分类号G06F13/42;

  • 国家 JP

  • 入库时间 2022-08-21 21:08:02

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