METHODS FOR ADJUSTING SAMPLING CLOCK OF SAMPLING CIRCUIT AND RELATED APPARATUSES

摘要

Methods for adjusting a sampling clock of a sampling circuit and related apparatuses are disclosed. One proposed method includes: calculating difference between adjacent sampled values, generated from the sampling circuit by sampling an incoming signal based on the sampling clock, to obtain a plurality of differences; performing a predetermined calculation on the differences to generate a calculated value, the differences including a first difference with a first absolute value and a second difference with a second absolute value less than the first absolute value, and the predetermined calculation causing that a ratio of component of the calculated value contributed by the first difference to component of the calculated value contributed by the second difference to be greater than a ratio of the first absolute value to the second absolute value; and adjusting phase of the sampling clock so that the calculated value generated by the predetermined calculation satisfies predetermined conditions.