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System, apparatus and method of providing accurate time-based counters for scaling operating frequencies of microprocessors

机译:提供精确的基于时间的计数器以缩放微处理器的工作频率的系统,装置和方法

摘要

The illustrative embodiments provide a system, apparatus and method for providing accurate time-based counters for scaling operating frequencies of microprocessors. The system, apparatus and method make use of a time-based counter circuit configuration in which a fixed frequency clock is derived from a PLL of the clock generation circuit of the microprocessor and is used to feed the external and internal timebase logic as well as a timebase accumulator counter. The timebase accumulator counter accumulates the tick events from the timebase logic between two core clocks. The accumulated value is transferred to the core clock domain on every clock edge of a scalable clock and the accumulator is then reset. Because the accumulated ticks are transferred to the core clock domain before the accumulator is reset, no ticks are ever lost using the circuitry of the illustrative embodiment.
机译:说明性实施例提供一种系统,装置和方法,用于提供精确的基于时间的计数器以缩放微处理器的工作频率。该系统,装置和方法利用基于时间的计数器电路配置,其中,固定频率时钟从微处理器的时钟生成电路的PLL导出,并用于馈送外部和内部时基逻辑以及时钟。时基累加器计数器。时基累加器计数器从两个核心时钟之间的时基逻辑中累积滴答事件。累加值在可伸缩时钟的每个时钟沿传输到核心时钟域,然后累加器复位。因为在重置累加器之前将累积的滴答滴答转移到核心时钟域,所以使用说明性实施例的电路不会丢失滴答滴答。

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