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Method and system for hardware efficient systematic approximation of square functions for communication systems
Method and system for hardware efficient systematic approximation of square functions for communication systems
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机译:用于通信系统平方函数的硬件有效系统逼近的方法和系统
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摘要
Certain aspects of a method and system for implementing approximation of a square function may comprise generating an output value by subtracting an absolute value of a first received input and a second received input. The generated output may be left shifted so as to generate a left shifted value. An output may be generated by left shifting by a plurality of bits, a sum of the generated left shifted value and the absolute value of the first received input. The second received input S may be determined by S=2└log2X┘, where X is the first received input. The plurality of bits used for left shifting during generation of the output may be determined by log2(S). A leading ‘1’ in the first received input may be detected in order to generate the second received input.
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