Offset cancellation amplifier, display employing the offset cancellation amplifier and method for controlling the offset cancellation amplifier

摘要

Disclosed is an offset cancellation amplifier which includes a first differential pair, second differential pair, a common load circuit for the two differential pairs, current sources, an amplifier stage, and first and second capacitors. The first capacitor is connected to the gate of one transistor of the first differential pair. During a first period of a data output period, an output voltage and the reference voltage are supplied to the gates of the first differential pair, the second capacitor is disconnected from the gate of the other transistor of the first differential pair. In this state, the output voltage is accumulated in the first and second capacitors. An input voltage is supplied in common to the gates of the second differential pair During the second period, the second capacitor is disconnected from the first capacitor and connected to the gate of the other transistor of the first differential pair. The output voltage is accumulated in the first capacitor, while the reference voltage is accumulated in the second capacitor. During the third period, the gates of the first differential pair cease to be supplied with the output voltage and with the reference voltage, respectively, and are supplied with the voltages accumulated in the first and second capacitors, respectively. The gates of the second differential pair are supplied with the output voltage and with the input voltage, respectively.