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PCI bridge device configured for using JTAG scan for writing internal control registers and outputting debug state

机译:配置为使用JTAG扫描来写入内部控制寄存器并输出调试状态的PCI桥设备

摘要

An integrated device (e.g., an integrated PCI bridge device), having configuration registers for storing configuration values, device logic for generating internal state values based on the configuration values, and a JTAG interface configured for receiving a serial input stream and outputting a serial output stream, further includes write logic and debug read logic. The write logic is configured for writing selected portions of the serial input stream into respective selected ones of the configuration registers, based on a detected input indicating a JTAG-based override. The debug read logic is configured, in response to a detected debug mode, for outputting selected internal state values for the serial output stream, based on selection values from the serial input stream and having been stored in a prescribed at least one of the selected configuration registers.
机译:集成设备(例如,集成PCI桥设备),具有用于存储配置值的配置寄存器,用于基于配置值生成内部状态值的设备逻辑以及配置用于接收串行输入流并输出串行输出的JTAG接口流,进一步包括写逻辑和调试读逻辑。写入逻辑被配置为基于检测到的指示基于JTAG的覆盖的输入,将串行输入流的选定部分写入配置寄存器中的各个选定寄存器中。调试读取逻辑被配置为响应于检测到的调试模式,用于基于来自串行输入流的选择值并已存储在指定的至少一种选定配置中,从而为串行输出流输出选定的内部状态值寄存器。

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