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Reconfigurable computing based multi-standard video codec
Reconfigurable computing based multi-standard video codec
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机译:基于可重构计算的多标准视频编解码器
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摘要
A circuit generally comprising a multiport memory, a direct memory access engine and a programmable gate array is disclosed. The direct memory access engine may be configured to transfer a first program to the multiport memory. The programmable gate array may be configured to (i) load the first program directly from the multiported memory to program a codec function and (ii) generate a video output signal by performing the codec function on a video input signal using video data exchanged with the multiport memory.
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